22 feb
Jr Spain
Estado de México
Position: Digital Verification Engineer Location: Barcelona An exciting opportunity has arisen to work on the latest cutting-edge RISC-V technology in the beautiful City of Barcelona.
In this new role as a Senior Digital Verification Engineer, you will have the opportunity to contribute to advanced technology nodes, consisting of RISC-V designs and architecture.
Required Skills: Masters or PhD degree in Electronics / Microelectronics or similar field 5+ years' experience in UVM environments ASIC / FPGA development System Verilog for IP / SOC Verification of digital ICs / ASIC IP or chips Complex ASIC designs architecture for advanced technology nodes Verification Metrics definition, Coverage analysis,
and debugging skills Knowledge and experience on setting up an ASIC Verification environment, methodology, and flow (e.g., vManager, vPlan, and Regressions) Digital Test Plan definition / creating / set-up test benches Scripting / coding skills - C/C++, Python, etc.
Bonus Skills: RISC-V / CPU / GPU (this is a bonus, not required) Knowledge of SOC verification is also a bonus Visa Sponsorship: Visa sponsorship can be offered if required (dependent on experience/qualifications).
For more information and a confidential discussion, please contact Rachel Mason at IC Resources.
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